AMD Confirms Delay of Bulldozer

During the company's press conference dedicated to the launch of AMD 9-series core-logic sets, AMD announced that its long-awaited FX-series microprocessors will be available within the next 60 to 90 days from now, which points to August or September. Mainboards based on the new AMD 9-series chipsets with AM3+ socket will support both existing high-performance multi-core Phenom II microprocessors as well as AMD FX-series chips with up to eight cores.


Below is official rendered image of AMD 8-Core FX Processor Black Edition box (PIB):

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Bulldozer Maybe Delayed and Need More Tuning

Advanced Micro Devices may further delay release of its highly-anticipated FX-series microprocessors code-named Zambezi that are based on the Bulldozer micro-architecture, according to leaked slides published by a Chinese web-site.


The slides also point to new model numbers for the chips: FX-8150, FX-8100, FX-6100 and FX-4100, which may indicate that the company intends to alter previously set specifications of the chips.

Earlier it was believed that AMD would launch its FX-series of chips in June, 2011. It was also reported that the highest-performing eight-core offering would cost $320, which is in line with the top-of-the-range Core i-series "Sandy Bridge" CPU.

The long-awaited CPUs are now fully-functional and work without flaws, according to a person who wished to remain anonymous. The problem with the delay of the AMD FX family of chips is that they currently cannot operate at truly high-speeds and thus cannot achieve performance levels that AMD wanted them to. As result, AMD will need to design a new stepping of the processor and therefore delay the commercial launch to September.

The currently available B0 and B1 stepping Zambezi/Bulldozer processors can function at around 2.50GHz/3.50GHz (nominal/turbo) clock-speeds and at such frequency they cannot deliver performance AMD considers competitive, a person with knowledge of the situation said on Monday. As a consequence, AMD needs to tune the design of the processor and create B2 stepping of the chip with better clock-speed potential amid similar thermal design power (TDP), which will take several months to complete.

This will slowdown revenue growth of the chip-maker and will also hit its reputation, as this is by far not the first or second delay of Bulldozer in general and Zambezi in particular.

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AMD to Fight i7 Sandy Bridge with Bulldozer

Advanced Micro Devices at present is not able to compete in terms of pure performance against Intel Corp.’s Core i7-series “Sandy Bridge” microprocessors, according to benchmark results, but with its next-generation Bulldozer-based chips the company fully aims to fight.


A leaked document from AMD seen by us here claims that AMD FX-series central processing unit (CPUs) powered by the Bulldozer micro-architecture will be fully able to rival Core i7 2600-series chips. Below is the art-work for FX processor box:


AMD plans to introduce AMD 900-series chipsets compatible with Zambezi processors in Q2 2011. The Bulldozer processors, Radeon HD 6000 "Northern Islands" discrete graphics cards and AMD 900-series core-logic sets will power AMD's next-generation enthusiast-class platform code-named Scorpius.

The initial family of AMD's FX-series microprocessors based on Bulldozer micro-architecture will include four models with eight, six or four cores and 95W or 125W thermal design power (TDP).

The first breed of AMD FX8000, FX6000 and FX4000 currently known under Zambezi code-name will completely support all the advantages that the Bulldozer micro-architecture is supposed to bring, including new Flex FP floating point processing unit. The new chips in maximum eight-core configurations are projected - by AMD's internal documents - to offer roughly 50% performance improvement over Phenom II-series microprocessors in multimedia applications.


The primary family of AMD FX-series central processing units (CPUs) will feature two eight-core models, one six-core flavour as well as a quad-core version. The chips will support dual-channel DDR3 1866MHz memory, will support Turbo Core dynamic acceleration technology and will come in AM3+ form-factor and will have 125W and 95W TDP. The second "wave" of Bulldozer chips will also include four microprocessors and will improve performance of the initial breed of CPUs.

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AMD's Financial Analyst Day 2010

At its annual Financial Analyst Day, AMD demonstrated how its unique combination of CPU and GPU computing technologies on a single die will enable breakthrough capabilities in an innovative processor design with planned OEM system availability in early 2011. AMD executives detailed how this new class of processor, AMD Fusion Accelerated Processing Units (APUs), is poised to create a sustained position of advantage by powering demanding PC workloads in sleek form factors with long battery life, pacing future AMD growth. AMD Fusion APUs are built from DirectX® 11-capable GPU technology and either low-power or high-performance multi-core x86 CPU technology. These APUs are designed to vastly improve today's Internet, video processing and playback, and gaming (client and online) experiences. For the first time, AMD also demonstrated its new high-performance x86 multi-core CPU architecture codenamed "Bulldozer" and provided additional information around the "Bulldozer" launch schedule.

AMD also announced several notable updates to its 2011-2012 roadmaps including:

Server - All “Bulldozer”, all the time



By the end of 2012, every new server CPU AMD bring to market will be based on the new “Bulldozer” architecture. “Bulldozer” will power multiple platforms designed to give server buyers what they keep asking for: more threads, more memory and the best performance-per-watt, per-dollar available. The “Terramar” CPU, planned for release in 2012, will indeed scale to 20 cores in our mainstream, 2- and 4-processor server platforms. The cloud’s new best friend will be “Sepang,” planned for release in 2012. “Sepang” is planned to scale up to 10 cores and is targeted at low-cost, low-power 1- and 2-way platforms.

Client Roadmap - Velocity goal: the best APUs every year

Velocity is the term Rick Bergman introduced last year to signal the new AMD Fusion APU design methodology and product introduction cadence. AMD Velocity builds on AMD’s already established annual GPU design cycle to achieve a faster pace of innovation than AMD previously achieved with a CPU-only development focus.




"Krishna" and "Wichita" are two and four-core 28nm APUs based on the next-generation sub-one watt "Bobcat" CPU cores and a DirectX 11-capable GPU, designed for the tablets, notebooks, HD netbooks, and desktop form-factors. "Trinity" is a 32nm APU based on AMD's next-generation "Bulldozer" CPU cores and a DirectX 11-capable GPU, designed for mainstream and high-performance desktops and notebooks. "Komodo" is a 32nm CPU featuring up to 10 AMD "Bulldozer" CPU cores designed for high-performance and enthusiast desktops.

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First Details about Bulldozer

Advanced Micro Devices revealed numerous details about the Bulldozer micro-architecture, which will power the company's next-generation central processing units (CPUs) for desktops, servers and workstations. Apparently, the main goal of AMD's designers when it came to Bulldozer was to ensure maximum sharing of resources within multi-core microprocessors to get high performance amid moderate low power and die sizes.

Traditional approach to creation of multi-core microprocessor is very straightforward: each core acts independently and shares only the most obvious resources with other: L3 cache, memory controller, processor bus, etc. In Bulldozer designs, cores will be able to dynamically share fetch and decode blocks, caches and other units. At least in initial designs, multi-core chips will consist of several major blocks, each of which will have two independent integer cores (that will share fetch, decode and L2 functionality) with dedicated schedulers and two 128-bit FMAC pipes with one FP scheduler. This means that each major block (Bulldozer Module) is, according to AMD, essentially a tightly-linked dual-core microprocessor with shared fetch, decode and floating point units.


Such "dual-core" major block will not be as efficient as two traditional cores, but will consume less power and will use less die space, which in effect means that more of major building blocks can be installed without increasing thermal design power or die size to unacceptable levels. Moreover, AMD reasonably claims that the approach is more efficient than simultaneous multi-threading or chip-level multi-threading. In fact, according to AMD, each major block can provide 80% performance of a dual-core microprocessor.

AMD also implied that Bulldozer will feature a new predication-directed instruction preset mechanism to overlap instruction miss requests to cache or memory and thus improve efficiency of execution. In particular, this will help AMD to maximize utilization of the "dual-core" major blocks of Bulldozer microprocessors.

Given the fact that AMD's Bulldozer architecture seems to be very modular, we can expect AMD to tailor designs in accordance with performance and/or power requirements.


The first Bulldozer processors will be made using 32nm SOI fabrication process in 2011 and that with 33% increase of the number of cores, up to 50% of additional performance may be received in server applications, at least, based on AMD's internal simulations.

More info : TechReport - AMD's Bulldozer architecture revealed

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